摘要： 类蜂巢结构快速样机平台(HLRESP)是一个基于现场可编程门阵列(FPGA)的通用样机平台，采用类似蜂窝状的系统结构。根据该样机平台特点，采用边界扫描技术进行板级和系统级的可测试性设计，扫描链路可以灵活配置，不仅能实现边界扫描测试，还能实现对可编程器件的在线编程，方便了样机平台的测试和调试工作，缩短了系统开发周期。
关键词:
快速样机原型,
可测试性设计,
JTAG
Abstract: The honeycomb-like rapid embedded system platform (HLRESP) is a kind of general-purpose platform based on field programming gate arrays (FPGA). It has a modularized and honeycomb-like structure. According to the feature of HLRESP, design for testability methods based on boundary scan technology are applied to the board level and system level design. The structure of boundary scan chain can be configured flexibly. Boundary scan test as well as in-system-programming(ISP) for programmable logic devices can be implemented. This gives facilities to test and debug the HLRESP, and development period of the system can be effectively shortened.
Key words:
Rapid system prototype,
Design for testability,
JTAG
陈伟男;周 博;彭澄廉;吴荣泉. 类蜂巢结构快速样机平台的可测试性设计[J]. 计算机工程, 2006, 32(24): 232-233.
CHEN Weinan; ZOU Bo; PENG Chenglian; WU Rongquan. Design for Testability in Honeycomb-like Rapid Embedded System Platform[J]. Computer Engineering, 2006, 32(24): 232-233.