摘要： 针对基于上下文的自适应二进制算术编码(CABAC)解码过程中数据依赖性强、并行度低的问题，提出一种优化的硬件结构来实现H.264/AVC高级档次高清视频序列的实时解码。该结构基于二级存储结构，采用语法元素合并和预测技术，对解码判决过程进行优化并对反二值化模块的电路进行复用。测试结果表明，该系统在较小的面积下能达到较高的性能，在FPGA上可以满足高清视频序列的实时CABAC解码需求。

关键词: H.264/AVC高级档次, 视频编码, 基于上下文的自适应二进制算术编码解码, 二级存储结构

Abstract: Aiming at the problem that the strong data dependency and low parallelism in Context-based Adaptive Binary Arithmetic Coding (CABAC), this paper proposes an optimized real time CABAC decoding architecture for H.264/AVC high profile in HD application. The architecture is based on the two-level storage structure and adopts syntax element prediction and merging strategies, optimizes the decoding decision processing and reuses the de-binarization circuits. Test results show that the architecture achieves a high performance with a low cost, and it is sufficient for HD application in FPGA.

Key words: H.264/AVC high profile, video coding, Context-based Adaptive Binary Arithmetic Coding(CABAC) decoding, two-level storage structure

中图分类号: 

• TP391