摘要： 边界扫描机制是一种新型的VLSI电路测试及可测试性设计方法。该文在研究边界 扫描体系结构和TAP接口控制器的基础上，在一个测试系统中，实现了基于JTAG规范的主TA P 接口设计。

关键词: 可测试性设计, 边界扫描, JTAG规范, TAP接口

Abstract: Boundary-scan technique(BST) is a new and effective way of test and design for testability for VLSI circuits. On the basis of research on the boun d ary-scan architecture and TAP controller, the paper implements a design for a T AP interface based on JTAG specification in a test system.

中图分类号: 

• TN402