摘要： 在SoC系统软硬件协同设计过程中,采用WISHBONE总线协议标准来构造虚部件级SoC系统,将经过软硬件划分后的软件和硬件在虚部件级进行协同仿真,再进行实部件级的综合。提出了一种基于ARMSim仿真内核的虚部件级微处理器(虚拟微处理器)的模型构造方法,可以简化SoC系统的设计。
关键词:
SoC,
虚拟微处理器,
WISHBONE总线,
ARMSim仿真内核
Abstract: In the process of HW/SW codesign of SoC system, the virtual component level SoC system using WISHBONE bus protocol standard is constructed. After being partitioned, it is cosimulated with software and hardware models in virtual component level .Then it proceeds to synthesis in real component level at last. This paper proposes a modeling methodology of virtual component level microprocessor (virtual microprocessor) based on ARMSim simulation core ,it can simplify the design of SoC system.
中图分类号:
夏新军,文宏,陈吉华. SoC设计中支持软硬件划分的虚拟微处理器[J]. , 2004, 30(18): 177-179.
XIA Xinjun1,WEN Hong1,CHEN Jihua2. Virtual Microprocessors Supportting HW/SW Partition in SoC Design[J]. , 2004, 30(18): 177-179.