作者投稿和查稿 主编审稿 专家审稿 编委审稿 远程编辑

›› 2005, Vol. 31 ›› Issue (01): 233-235.

• 论文 • 上一篇    下一篇

基于JTAG的DSP处理器嵌入式调试接口设计

吴皓,刘鹏   

  1. 浙江大学信息与电子工程学系,浙江大学信息与电子工程学系 杭州 310027
  • 发布日期:2005-01-15

Implementation of Debug Interface of DSP Processor Based on JTAG Architecture

WU Hao, LIU Peng   

  1. ( Department of Information Science and Electronic Engineering, Zhejiang University,Hangzhou 310027)
  • Published:2005-01-15

摘要: 介绍了基于IEEE1149.1 JTAG协议的DSP处理器嵌入式调试接口的设计。从该接口的整体结构框图到详细设计,进行了详细的阐述。该接口成功地应用于32bits DSP处理器MD32中,通过了FPGA验证和仿真验证,证明了其设计的正确性,具有很好的参考价值。

关键词: IEEE1149.1协议(JTAG), DSP, 调试接口

Abstract: A debug interface based on IEEE1149.1 JTAG architecture is developed. The design is described from the overview to the detailed module design. This interface is successfully used in MD32,a 32bits DSP Processor, and is verified by both software simulation and FPGA hardware emulation.

中图分类号: