计算机工程 ›› 2011, Vol. 37 ›› Issue (18): 142-144.doi: 10.3969/j.issn.1000-3428.2011.18.047

• 安全技术 • 上一篇    下一篇

AES算法优化及其在ARM上的应用

张新贺,张月华,白茹雪,刘鸿雁   

  1. (辽宁科技大学电子与信息工程学院,辽宁 鞍山 114051)
  • 收稿日期:2011-03-15 出版日期:2011-09-20 发布日期:2011-09-20
  • 作者简介:张新贺(1980-),男,讲师、硕士,主研方向:信息安全,嵌入式技术;张月华,讲师、硕士;白茹雪,硕士;刘鸿雁,教授
  • 基金项目:
    鞍山市科委基金资助项目(2006SH16)

AES Algorithm Optimization and Its Application in ARM

ZHANG Xin-he, ZHANG Yue-hua, BAI Ru-xue, LIU Hong-yan   

  1. (School of Electronic and Information Engineering, University of Science and Technology Liaoning, Anshan 114051, China)
  • Received:2011-03-15 Online:2011-09-20 Published:2011-09-20

摘要: 提出一种高级加密标准(AES)算法的优化方案,适合在ARM处理器上运行长度均为128位的明文和密钥。将输入的明文和密钥按列优先原则排列成4×4的状态矩阵。对列混合、逆列混合以及密钥扩展进行优化,采用轮打开方式和轮不打开方式在S3C2440平台上实现该算法。结果表明,该算法可以在ARM上高效运行,并占用较少的ROM空间。

关键词: 高级加密标准, ARM处理器, 算法优化, 加密, 解密, 密钥扩展

Abstract: This paper introduces an optimization of Advanced Encryption Standard(AES) with 128-bit block length and key length. It can speed up execution on ARM microprocessor. The block and key are processed as arrays of bytes that are formed by dividing these sequences into groups of 4×4 to form arrays of bytes. The row mix, opposite row mix and key extension are optimized. The optimized algorithm is realized in S3C2440 processor by loop unrolling and iterative loop. Experimental results show that AES can be realized efficiently on ARM process, and consume less ROM.

Key words: Advanced Encryption Standard(AES), ARM processor, algorithm optimization, encryption, decryption, key expansion

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