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计算机工程 ›› 2006, Vol. 32 ›› Issue (7): 14-16.

• 博士论文 • 上一篇    下一篇

Timed CSP 在硬件高层设计中的应用

崔小欣,于敦山,崔小乐,盛世敏   

  1. 北京大学信息科学技术学院微电子所,北京 100871
  • 出版日期:2006-04-05 发布日期:2006-04-05

Application of High-level Design of Hardware with Timed CSP

CUI Xiaoxin, YU Dunshan, CUI Xiaole, SHENG Shimin   

  1. Institute of Microelectronics, School of Information Science and Technology, Peking University, Beijing 100871
  • Online:2006-04-05 Published:2006-04-05

摘要: 介绍了一种将TCSP 语言用于硬件高层次系统设计的方法。该方法以HDL 语言作为系统功能实现的核心,以TCSP 语言作为系统高层次描述的外壳,从而弥补了HDL 在高层形式说明和结构与实时功能表达方面的不足;同时该方法将时序与功能一体化描述,进一步丰富了硬件系统规格的内容,为复杂的硬件系统设计提供了一种可执行的规格说明方法。

关键词: Timed CSP;HDL;高层次系统描述;SEC

Abstract: This paper provides a feasible way to system level design of hardware with timed CSP(TCSP). The system function implementation is based on HDL languages, and the shell is implemented with TCSP. Generally, HDL languages have no formal semantics, and they are not good at system level architecture description and real-time functional specification. In the method, this shortcoming is eliminated, the timing and function are described simultaneously, and the proposed method is a novel way to create executable specifications of the hardware system.

Key words: Timed CSP; HDL; High-level system description; SEC