摘要： 借助软件测试思想，将其应用到行为级描述时序电路测试生成当中。对所生成测试矢量用门级时序电路故障模拟器来反映测试矢量对相应的门级电路故障检测能力。这对复杂的电路故障检测和测试生成提供了一种新的解决问题途径。

关键词: VHDL, 软件测试时序, 时序电路测试

Abstract: This paper borrowed ideas from software testing and applied them to generate hardware tests at the behavioral level ofdescription. To the vectors of tests. we can use struck at fault simulator for sequential cireuits to show its fault coverage. This methodocovidod a new avenue for sequential circuits testing generation.

中图分类号: 

• TN707