摘要： 介绍了大规模并行数据广播接收卡的整体设计及实现。其中着重于硬件部分的设计。接收卡与用户PC机的接口采用了即插即用USB2.0接口,此卡设计的核心部分采用了FPGA来实现;应用软件采用VC++编写。

关键词: FPGA, VC++, DVB-C, 并行数据广播

Abstract: This paper introduces the integral design and realization of the parallel data broadcast receiving-card, it emphasizes on the realizationof hardware. USB2.0 is adapted to realize the interface between user’s PC and receiving-card. FPGA is used to realize the core of the receiving-card.Application software written in VC++ is completed.

中图分类号: 

• TP334.7