摘要： 介绍了在USB 数据通信中，串行接口引擎数据采样功能模块的设计实现。说明了数字锁相环对12Mbit/s 数据流进行采样的工作原理和相位偏移、频率偏移消除方法。还说明了该数字锁相环的效率和出错概率。
关键词:
USB；串行接口引擎；数字锁相环
Abstract: The paper introduces the design and implementation of data sampling module of serial interface engine (SIE) in USB communication. The principle of digital phase locked logic (DPLL) working on sampling 12Mbit/s data stream and the method of eliminating phase offset and frequency offset are explained in detail. Finally, the efficiency and error probability are demonstrated
Key words:
USB; Serial interface engine (SIE); Digital phase locked logic (DPLL)
聂新义，任敏华. USB 通信中数字锁相环的设计实现[J]. 计算机工程, 2006, 32(4): 269-271.
NIE Xinyi, REN Minhua. Design and Implementation of DPLL in USB Communication[J]. Computer Engineering, 2006, 32(4): 269-271.