计算机工程 ›› 2010, Vol. 36 ›› Issue (10): 248-250.doi: 10.3969/j.issn.1000-3428.2010.10.086

• 工程应用技术与实现 • 上一篇    下一篇

以太网交换控制芯片的缓存结构

刘 宇1,王玉艳2   

  1. (1. 上海交通大学微电子学院,上海 200240;2. 华东计算技术研究所,上海 200233)
  • 出版日期:2010-05-20 发布日期:2010-05-20

Buffer Structure of Ethernet Switch and Control Chip

LIU Yu1, WANG Yu-yan2   

  1. (1. School of Micro-electronics, Shanghai Jiaotong University, Shanghai 200240; 2. East China Institute of Computer Technology, Shanghai 200233)
  • Online:2010-05-20 Published:2010-05-20

摘要: 为实现交换控制,需要为以太网交换控制芯片选择合理的数据缓存结构。采用数据包缓存空间的分页管理模式、空闲缓存空间的调度方法和出口端口队列管理技术,通过数据包缓存空间描述符设计方法和对应的目的端口结构分析,提高交换控制芯片缓存空间的使用效率并增强芯片性能。

关键词: 缓存管理, 共享缓存结构, 描述符, 输出队列

Abstract: To realize switch and control, it is necessary to select suitable data buffer structure for Ethernet switch and control chip. This paper uses pagination management mode of packet buffer space, assignment and release method of idle buffer space, management technology of output port queue. It increases usage efficiency of switch and control chip buffer space and enhances chip performance through the design method for descriptor of packet buffer space and the relative analysis of destination port structure.

Key words: buffer management, common buffer structure, descriptor, egress queue

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