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计算机工程 ›› 2011, Vol. 37 ›› Issue (20): 239-241. doi: 10.3969/j.issn.1000-3428.2011.20.082

• 工程应用技术与实现 • 上一篇    下一篇

基于SoPC的前端RapidIO接口设计

施春辉,柴小丽,宋慰军,章 乐   

  1. (中国电子科技集团公司第三十二研究所,上海 200233)
  • 收稿日期:2011-03-13 出版日期:2011-10-20 发布日期:2011-10-20
  • 作者简介:施春辉(1986-),男,硕士研究生,主研方向:计算机高速总线;柴小丽,研究员;宋慰军,工程师;章 乐,硕士

Design of Front RapidIO Interface Based on SoPC

SHI Chun-hui, CHAI Xiao-li, SONG Wei-jun, ZHANG Le   

  1. (The 32nd Resaerch Institute of China Electronics Technology Group Corporation, Shanghai 200233, China)
  • Received:2011-03-13 Online:2011-10-20 Published:2011-10-20

摘要: 针对现代高性能嵌入式系统高速RapidIO信号接入的应用需求,提出一种基于可编程片上系统(SoPC)的前端RapidIO接口设计方案,以VirtexII Pro现场可编程门阵列芯片为核心,利用RapidIO IP核等库资源及硬件编程实现RapidIO接口、低压差分信号图像接口、RS422控制接口间的信息转发逻辑。该方案能够提高信息采集和输出的时效性。

关键词: 嵌入式系统, 可编程片上系统, RapidIO协议, 低压差分信号

Abstract: With respect to the requirement of high speed RapidIO signal connection of high performance embedded system, this paper proposes a method for a front RapidIO interface on System-on-a-Programmable-Chip(SoPC). The method builds message transmission logic among RapidIO interface, Low Voltage Differential Signal(LVDS) image interface and RS422 control interface with RapidIO IP core and hardware programming based on the development platform of Xilinx VirtexII Pro. Hardware architecture diagrams and key design thoughts are introduced and the software architecture is presented.

Key words: embedded system, System-on-a-Programmable-Chip(SoPC), RapidIO protocol, Low Voltage Differential Signal(LVDS)

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