计算机工程

• 体系结构与软件技术 • 上一篇    下一篇

高效可配的对称密钥算法硬件架构设计

黄凯  1,金孝飞  1,修思文  2,唐从学   3,严晓浪  1   

  1. (1.浙江大学超大规模集成电路研究所,杭州 310027; 2.中国计量学院光学与电子科技学院,杭州 310018; 3.杭州朔天科技有限公司,杭州 310012)
  • 收稿日期:2014-10-22 出版日期:2015-09-15 发布日期:2015-09-15
  • 作者简介:黄凯(1980-),男,副教授,主研方向:片上系统设计;金孝飞,硕士研究生;修思文,讲师;唐从学,硕士研究生;严晓浪,教授。
  • 基金项目:
    国家自然科学基金资助项目(61100074);中央高校基本科研业务费专项基金资助项目(2013QNA5008);国家电网智能电网研究院基金资助项目“新一代智能电网片上系统芯片关键技术研究”(SGRI-WD-71-13-014)。

Design of Efficient Reconfigurable Hardware Architecture of Symmetric Key Algorithms

HUANG Kai 1,JIN Xiaofei 1,XIU Siwen 2,TANG Congxue 3,YAN Xiaolang 1   

  1. (1.Institute of VLSI Design,Zhejiang University,Hangzhou 310027,China; 2.College of Optical and Electronic Technology,China Jiliang University,Hangzhou 310018,China; 3.Hangzhou Sec-Chip Technology Co.,Ltd.,Hangzhou 310012,China)
  • Received:2014-10-22 Online:2015-09-15 Published:2015-09-15

摘要: 针对密码算法用户对于多种对称密钥算法高效可配的使用需求,设计一种新的对称密钥算法硬件架构。根据各密钥算法的特点,分析其运算逻辑并进行拆分,使用基础运算单元可重构方法将各算法实现在同一运算核心模块上,在保证电路时序的情况下,节约电路的整体面积,提高电路的单位面积吞吐率。该架构具有较好的扩展性,便于新对称密钥算法的进一步重构实现。仿真结果表明,该架构在实现同类算法时,电路面积和单位面积吞吐率均优于状态阵列重构、S盒查找表优化等架构,在实现多种算法时,其面积增加也较少。

关键词: 信息安全, 对称密钥, 基础运算单元, 可重构, 高性能, 嵌入式系统

Abstract: To meet the users’ needs for a variety of algorithms,this paper presents a symmetric key algorithms hardware architecture.It analyzes every algorithms and makes a logic separation,based on the characteristics of each algorithm.It efficiently implements various algorithms in the same operation module by using basic arithmetic unit reconfigurable method.The architecture is easily to extend with a new symmetric key algorithm.Simulation results show that the proposed architecture has a better throughput and uses smaller area than the existing design(cell array reconfigurable architecture,LUT optimized architecture,e.g.) while implementing the same kind of algorithm.To implement more algorithms,it has a very small increasement in the circuit area.

Key words: information security, symmetric key, basic arithmetic unit, reconfigurable, high performance, embedd-ed system

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