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计算机工程

• 体系结构与软件技术 • 上一篇    下一篇

多核浮点非线性运算协处理器的设计与实现

马小霞,李文新,金田,赵彦荣,夏加高   

  1. (兰州空间技术物理研究所,兰州 730000)
  • 收稿日期:2016-01-18 出版日期:2017-02-15 发布日期:2017-02-15
  • 作者简介:马小霞(1990—),女,硕士研究生,主研方向为空间电子技术;李文新,研究员、博士;金田、赵彦荣,硕士;夏加高,博士研究生。
  • 基金资助:

    载人航天重大工程专项。

Design and Implementation of Multicore Floating-point Nonlinear Operation Coprocessor

MA Xiaoxia,LI Wenxin,JIN Tian,ZHAO Yanrong,XIA Jiagao   

  1. (Physical Institute of Lanzhou Space Technology,Lanzhou 730000,China)
  • Received:2016-01-18 Online:2017-02-15 Published:2017-02-15

摘要:

在载人航天飞船的终端仪器仪表设计中,处理算法中的浮点非线性运算常采用库函数实现,但软件实现非线性函数执行速度慢,限制了浮点算法的应用。为此,针对航天领域处理器不支持非线性函数运算的情况以及浮点算法执行速度慢的问题,提出一种多核并行执行浮点非线性运算处理方法,利用现场可编程门阵列内部并行架构带来的低延迟特性来提高非线性浮点运算的速度。仿真实验结果表明,该方法可计算有限定义域范围内的浮点非线性函数,有效提高浮点运算的执行速度。

关键词: 浮点数, 多核运算协处理器, 非线性函数, CORDIC算法, 现场可编程门阵列, 并行

Abstract:

When designing terminal instrument for manned spacecraft,the floating-point nonlinear operation of processing algorithms is achieved by library function.But the speed is always very slow,when software is used to implement nonlinear operations,which limits the application of many floating-point algorithms.A multicore parallel method based on FPGA is presented for the purpose of processing nonlinear functions and low run speed.It makes full use of the advantage which FPGA’s parallel internal architecture to improve nonlinear operation speed.Simulation experimental results that the method can calculate nonlinear functions within the scope of limited definition domain and improve floating-point operation speed effectively.

Key words: floating-point numbers, multicore operation coprocessor, nonlinear functions, CORDIC algorithm, Field-Programmable Gate Array(FPGA), parallel

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