Implementation of Parallel Signal Processing System Based on     FPGA and Multi-DSP

doi:10.3969/j.issn.1000-3428.2006.23.088

Computer Engineering ›› 2006, Vol. 32 ›› Issue (23): 247-249. doi: 10.3969/j.issn.1000-3428.2006.23.088

• Engineer Application Technology and Realization • Previous Articles Next Articles

Implementation of Parallel Signal Processing System Based on FPGA and Multi-DSP

PAN Fangsheng1,2,　ZHAO Feng1, XI Jun2, LUO Yi2

(1. School of Micro-electronic, Shanghai Jiaotong University, Shanghai 200030; 2. East China Institute of Computing Technology, Shanghai 200233)

Received:1900-01-01 Revised:1900-01-01 Online:2006-12-05 Published:2006-12-05

基于FPGA和多DSP的并行信号处理系统的实现

潘昉晟1,2，赵峰1，奚军2，骆意2

(1. 上海交通大学微电子学院，上海 200030；2. 华东计算技术研究所，上海 200233）

Abstract

Abstract: In the field of high-speed real-time signal processing, the conventional single-chip system can hardly achieve goals due to poor processing ability. Therefore, multiple-processor parallel signal processing system turns to be the focus. The paper presents a parallel processing system based on 4 chips of TMS320C6701——high performance floating-point DSP of TI. The system accomplishes the communication between DSPs through the software-FIFO architecture in FPGA.

Key words: Parallel processing, FPGA, Multi-DSP

摘要： 为了克服在高速实时信号处理领域中传统单DSP系统处理能力的瓶颈，多DSP并行处理技术应运而生，成为当前该领域研究的热点。该文提出了一种基于FPGA内部的软FIFO互连结构和4片TI公司的高性能浮点型DSP——TMS320C6701构成的多个DSP之间通信的并行信号处理系统。

关键词: 并行处理, FPGA, 多DSP

PAN Fangsheng;　ZHAO Feng; XI Jun; LUO Yi. Implementation of Parallel Signal Processing System Based on FPGA and Multi-DSP[J]. Computer Engineering, 2006, 32(23): 247-249.

潘昉晟;赵峰;奚军;骆意. 基于FPGA和多DSP的并行信号处理系统的实现[J]. 计算机工程, 2006, 32(23): 247-249.

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