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计算机工程 ›› 2013, Vol. 39 ›› Issue (8): 307-313.

• 开发研究与工程应用 • 上一篇    下一篇

基于FPGA的互相关无串扰超声测距系统

王荣扬1,钱振华1,殷勇辉2   

  1. (1. 湖州职业技术学院湖州市工业自动化技术研发中心,浙江 湖州 313000;2. 华东理工大学机械与动力工程学院,上海 200237)
  • 收稿日期:2012-07-10 出版日期:2013-08-15 发布日期:2013-08-13
  • 作者简介:王荣扬(1987-),男,硕士,主研方向:机器人技术,机电一体化;钱振华,讲师、硕士;殷勇辉,副教授、博士
  • 基金资助:
    浙江省教育厅科研基金资助项目(Y201223036)

Noncrosstalk Ultrasonic Distance Measurement System with Cross-correlation Operation Based on FPGA

WANG Rong-yang 1, QIAN Zhen-hua 1, YIN Yong-hui 2   

  1. (1. Huzhou Industry Automatic Technology R&D Center, Huzhou Vocational and Technical College, Huzhou 313000, China; 2. School of Mechanical and Power Engineering, East China University of Science and Technology, Shanghai 200237, China)
  • Received:2012-07-10 Online:2013-08-15 Published:2013-08-13

摘要: 多传感器超声测距系统工作时存在超声串扰,会导致测量结果失真并降低系统工作效率。为此,利用伪随机序列优越的自相关性,通过对发射信号和回波信号进行互相关运算消除串扰。提出一种利用异或运算代替乘法运算的并行数字相关技术捕获算法。可编程逻辑门阵列(FPGA)仿真结果表明,该算法可以消除实时超声测距系统的串扰和误码干扰,明显减少算法运算量及数据处理时间,提高FPGA逻辑资源利用率及超声测距系统的精度。

关键词: 相关捕获, 伪随机序列, 超声测距, 超声串扰, 可编程逻辑门阵列

Abstract: Ultrasonic crosstalk, which can seriously result in false distance measurement and lessen the work efficiency of ultrasonic distance measurement system, often occurs when multiple transducers work together. Using the cross-correlation characteristic of pseudo-random sequence technique can eliminate the phenomenon of ultrasonic crosstalk by calculating the cross-correlation function of a detected ultrasonic wave and a transmitted ultrasonic wave. A parallel digital correlation algorithm is proposed by using xor and add operation instead of multiplication. The results of Programmable Logic Gate Array(FPGA) simulation demonstrate that the proposed method can eliminate ultrasonic crosstalk and errs, and shorten algorithm computation, the processing time and improve the utilization ratio of FPGA resource, the precision of distance measurement system.

Key words: correlation-capture, pseudo-random sequence, ultrasonic distance measurement, ultrasonic crosstalk, Programmable Logic Gate Array(FPGA)

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