摘要： 对一种占用硬件资源最少的码长为n=2m-1的纠二错二进制BCH码译码器电路进行了改进,使其能用于信道的连续译码,并对算法中的关键点 S_3 ( x ) 查找表的实现提出一种新的简单方法。
关键词:
BCH码,
硬件译码器,
逐位判断逐位纠正算法
Abstract: This paper improves a high-speed algorithm of double-error-correcting BCH codes of length n=2m-1 in continuous decoding condition.A new method for the key point of this algorithm, the lookup table of ,S~3 ( x )is presented to simplify the difficulty of realizing the circuit.
中图分类号:
刘凌志,戎蒙恬,罗伟毅. 一种新型快速纠二错BCH码译码器的设计[J]. , 2004, 30(22): 178-180.
LIU Lingzhi1, RONG Mengtian1, LUO Weiyi2. A New High-speed Decoder for Double-error-correcting BCH Codes[J]. , 2004, 30(22): 178-180.