摘要： 针对电力线通信G3物理层协议下，现场可编程门阵列(FPGA)在实现时资源消耗大的问题，提出一种适合于硬件实现的FPGA方案及优化算法，包括本地的存储P符号量化处理、互相关值Q(n)绝对值归一化处理以及奇异值分解等方法。将FPGA实现后的结果与算法仿真的结果进行比对分析，结果证明，该优化算法能够精确地估计信道，可用于硬件实现。

关键词: 电力线通信, 频偏估计, 信道估计, 正交频分复用, 现场可编程门阵列

Abstract: In Power Line Communication(PLC) G3 physical layer protocol, for the problem of large resource consume on realization of Field Programmable Gate Array(FPGA), an improved algorithm suited for FPGA implementation is proposed, which uses the quantification of P signal saves in local, the absolute normalization method of Q(n) and Singular Value Decomposition (SVD). The analysis and comparison between the result of FPGA implementation and algorithm simulation show that the improved algorithm can accurately estimate the channel, and the FPGA implementation is reasonable.

Key words: Power Line Communication(PLC), frequency offset estimation, channel estimation, Orthogonal Frequency Division Multiplexing(OFDM), Field Programmable Gate Array(FPGA)

中图分类号: 

• TP393