计算机工程 ›› 2011, Vol. 37 ›› Issue (23): 208-210.doi: 10.3969/j.issn.1000-3428.2011.23.071

• 工程应用技术与实现 • 上一篇    下一篇

基于CORDIC算法的FFT处理器设计

彭清兵 a,李方军 b   

  1. (吉首大学 a. 物理科学与信息工程学院;b. 数学与计算机科学学院,湖南 吉首 416000)
  • 收稿日期:2011-06-17 出版日期:2011-12-05 发布日期:2011-12-05
  • 作者简介:彭清兵(1974-),男,讲师,主研方向:数字信号处理;李方军,高级实验师
  • 基金项目:
    湖南省教育厅科研基金资助项目(10C1099)

Design of FFT Processor Based on CORDIC Algorithm

PENG Qing-bing a, LI Fang-jun b   

  1. (a. College of Physics Science and Information Engineering; b. College of Mathematic and Computer Science, Jishou University, Jishou 416000, China)
  • Received:2011-06-17 Online:2011-12-05 Published:2011-12-05

摘要: 采用CORDIC算法和无乘法器的蝶形运算操作,建立Matlab函数模型。合理选择迭代级数和运算数据位宽,设计一种新的高信噪比快速傅里叶变换(FFT)处理器。在最优化设计中,信噪比可以达到88 dB,在加入溢出保护设计后,硬件实现的信噪比可以达到80 dB,功耗减少20.63%。仿真结果表明,该处理器具有芯片面积较小、精度高、功耗低、信噪比高等优点。

关键词: 快速傅里叶变换, CORDIC算法, 误差, 噪比, 处理器

Abstract: A Matlab function model is built through using CORDIC algorithm and butterfly operation without multiplier. By choosing reasonable iterative series and the operation data bit width, a novel Fast Fourier Transform(FFT) processor with high Signal Noise Ratio(SNR) is designed. In the Matlab simulation, the SNR can reach 88 dB. After adding the overflow protection, the SNR realized by hardware can reach 80 dB, and the power consumption can be reduced by 20.63%. The designed FFT processor has many advantages such as smaller chip area, high accuracy, lower power consumption and high SNR.

Key words: Fast Fourier Transform(FFT), CORDIC algorithm, error, Signal Noise Ratio(SNR), processor

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