计算机工程 ›› 2012, Vol. 38 ›› Issue (7): 281-283.doi: 10.3969/j.issn.1000-3428.2012.07.092

• 开发研究与设计技术 • 上一篇    下一篇

基于ESL快速精确的处理器混合模型

鲁 超,魏继增,常轶松   

  1. (天津大学计算机科学与技术学院,天津 300072)
  • 收稿日期:2011-08-24 出版日期:2012-04-05 发布日期:2012-04-05
  • 作者简介:鲁 超(1986-),男,硕士研究生,主研方向:片上系统设计;魏继增,讲师、博士;常轶松,博士研究生
  • 基金项目:
    天津市科技支撑计划基金资助重点项目“面向多媒体应用的可定制处理器及SoC平台的研发”(08ZCGYGX00400)

Fast and Accurate Processor Hybrid Model Based on ESL

LU Chao, WEI Ji-zeng, CHANG Yi-song   

  1. (School of Computer Science and Technology, Tianjin University, Tianjin 300072, China)
  • Received:2011-08-24 Online:2012-04-05 Published:2012-04-05

摘要: RTL设计不能满足片上系统对仿真速度的要求。为此,提出一种基于电子系统级快速精确的处理器混合模型。以32位嵌入式微处理器C*CORE340为例,采用不同的抽象层次对指令集仿真器和Cache进行构建。实验结果表明,与RTL级模型相比,该模型的仿真速度至少快10倍,仿真精度误差率低于10%。

关键词: 指令集仿真器, 事务级建模, 电子系统级设计, 混合模型, 片上系统

Abstract: For RTL design cannot meet the requirement of the speed of System on Chip(SoC), this paper presents a fast and accurate processor hybrid model based on Electronic System Level(ESL). It uses the proprietary 32 bit embedded microprocessor C*CORE340 based on ESL design methodology. For this target the Instruction Set Simulator(ISS) and Cache adopt the different abstraction layers to construct. Experimental results show that the simulation speeds of hybrid model is a least 10 times faster than that of RTL model, and the less than 10% error rate simulation accuracy is gotten.

Key words: Instruction Set Simulator(ISS), transaction level modeling, Electronic System Level(ESL) design, hybrid model, System on Chip(SoC)

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