摘要: 为满足现代数字信号处理中大量数据的运算需求,利用ARM946和Xilinx公司的现场可编程门阵列芯片逻辑资源和IP库,设计专门用于浮点复数向量运算的64位协处理器,对相关浮点运算进行优化,并在硬件仿真平台上进行测试。结果表明,该协处理器可使浮点复数向量运算性能得到大幅提高。
关键词:
现场可编程门阵列,
浮点复数向量,
协处理器,
批处理
Abstract: To meet the requirement of a series of complex data processing in modern Digital Signal Processor(DSP), a 64 bit floating-point coprocessor specially for floating-point complex vector arithmetic is proposed with the logic resources and IP library of ARM9 and the Field Programmable Gate Array(FPGA) chip from Xilinx. The algorithm of related floating-point arithmetic could be revised. Results of the test on the hardware simulation platform show that the floating-point complex vector arithmetic performance is greatly improved by the coprocessor.
Key words:
Field Programmable Gate Array(FPGA),
floating-point plural vector,
coprocessor,
batch processing
中图分类号:
韩正飞, 李劲松, 潘红兵, 李丽, 沙金, 何书专. 基于FPGA的浮点向量协处理器设计[J]. 计算机工程, 2012, 38(5): 251-254.
HAN Zheng-Fei, LI Jin-Song, BO Gong-Bing, LI Li, SHA Jin, HE Shu-Zhuan. Design of Floating-point Vector Coprocessor Based on FPGA[J]. Computer Engineering, 2012, 38(5): 251-254.