摘要： 介绍了 MPEG-2标准视频部分的算法原理，用CPLD实现解码器中的反向量化部分，它的描述语言是VHDL，并用EDA工具MAX+PLUS II进行功能仿真，验证了设计的正确性，5×7×8位的运算速度达到MPEG-2的要求。
关键词:
MPEG-2,
反量化,
乘法器,
CPLD
Abstract: This thesis introduces the basic arithmetic of video in MPEG-2. It implements the IQ in decoder with CPLD. The description language is VHDL. It simulates the design with Max+plus II to make sure it. The result is that it can finish the multiplication correctly and match the speed requirement of MPEG-2.
中图分类号:
孙季丰,李颖雄. MPEG-2反量化电路的VHDL实现[J]. , 2003, 29(15): 33-35.
SUN Jifeng, LI Yingxiong. Realization of Inverse Quantization Circuit in MPEG-2 with VHDL[J]. , 2003, 29(15): 33-35.