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计算机工程

• 移动互联与通信技术 • 上一篇    下一篇

一种新的频偏估计算法FPGA实现方案

陈朝廷,冷文,王安国   

  1. (天津大学电子信息工程学院,天津 300072)
  • 收稿日期:2014-11-26 出版日期:2015-11-15 发布日期:2015-11-13
  • 作者简介:陈朝廷(1988-),男,硕士研究生,主研方向:无线通信信号处理;冷文,讲师;王安国,教授。
  • 基金资助:
    毫米波国家重点实验室开放课题基金资助项目(K201314)。

A Novel FPGA Implementation Scheme of Frequency Offset Estimation Algorithm

CHEN Zhaoting,LENG Wen,WANG Anguo   

  1. (School of Electronic Information Engineering,Tianjin University,Tianjin 300072,China)
  • Received:2014-11-26 Online:2015-11-15 Published:2015-11-13

摘要: 基于IEEE 802.15.4协议信号模型,采用简化频偏估计算法,提出一种适用于突发通信模式,基于频偏估计算法的现场可编程门阵列(FPGA)实现方案。该方案包括定时恢复、频偏估计及频偏纠正模块,通过串行运算等方法解决并行算法资源消耗较大的问题,使用下采样 以及双口RAM减小延迟,提高运算速度。采用优化结构的方式,在保证低资源占用率的基础上,使该FPGA硬件实现方案具有较大的频偏估计范围以及较高的频偏估计精度。分析结果证明了其有效性。

关键词: 频偏估计, 现场可编程门阵列, 采样信号, 资源占用率, IEEE 802.15.4协议

Abstract: Based on IEEE 802.15.4 signal model,by adopting the simplified frequency offset estimation algorithm,a novel Field Programmable Gate Array(FPGA) implementation scheme of frequency offset estimation algorithm is proposed in this paper,which saves hardware resources and is suitable for burst mode communication.The proposed scheme in the paper includes timing recovery,frequency offset estimation and frequency offset correction modules.By transforming parallel to serial calculation,the hardware resource occupation is reduced greatly.Using down-sample and dual-port RAM,the computing speed is improved effectively.By optimizing architecture,the FPGA implementation of frequency offset estimation and correction algorithm proposed in the paper is with large frequency offset estimation range,high frequency accuracy performance and low ratio in hardware resource utilization.Analysis results show the validity of it.

Key words: frequency offset estimation, Field Programmable Gate Array(FPGA), sampled signal, resource occupancy rate, IEEE 802.15.4 protocol

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