[1] AWAIS M,SINGH A,BOUTILLON E,et al.A novel architecture for scalable,high throughput,multi-standard LDPC decoder,in digital system design[C]//Proceedings of the 14th EUROMICRO Conference on Digital System Design.Washington D.C.,USA:IEEE Press,2011:340-347. [2] VERMA S,SHARMA S.FPGA implementation of low complexity LDPC iterative decoder[J].International Journal of Electronics Letters,2015,103(7):1112-1126. [3] BONCALO O,AMARICAI A,MIHANCEA P,et al.Memory trade-offs in layered self-corrected min-sum LDPC decoders[J].Analog Integrated Circuits and Signal Processing,2016,87(2):169-180. [4] YAN Jiankang,CHEN Gengsheng.Improved H-Storm platform based on co-scheduling of CPU/GPU heterogeneous resource[J].Computer Engineering,2018,44(4):1-11.(in Chinese)严健康,陈更生.基于CPU/GPU异构资源协同调度的改进H-Storm平台[J].计算机工程,2018,44(4):1-11. [5] CHEN Yong,WU Xiaomin,YANG Jian,et al.Design and implementation of H.264 parallel decoder based on CUDA[J].Computer Engineering,2016,42(5):249-252,257.(in Chinese)陈勇,吴晓民,杨坚,等.基于CUDA的H.264并行解码器设计与实现[J].计算机工程,2016,42(5):249-252,257. [6] WANG G H,WU M,YIN B,et al.High throughput low latency LDPC decoding on GPU for SDR systems[C]//Proceedings of IEEE Global Conference on Signal and Information Processing.Washington D.C.,USA:IEEE Press,2013:1258-1261. [7] YUAN Jinyang,SHA Jin.4.7-Gb/s LDPC decoder on GPU[J].IEEE Communications Letters,2018,22(3):478-481. [8] ZHAO Y,LAU F.Implementation of decoders for LDPC block codes and LDPC convolutional codes based on GPUs[J].IEEE Transactions on Parallel and Distributed Systems,2014,25(3):663-672. [9] HOU Yi,LIU Rongke,PENG Hao,et al.High throughput pipeline decoder for LDPC convolutional codes on GPU[J].IEEE Communications Letters,2015,19(12):2066-2069. [10] LIN Yong,NIU Wensheng.High throughput LDPC decoder on GPU[J].IEEE Communications Letters,2014,18(2):344-347. [11] KESKIN S,KOCAK T.GPU-based gigabit LDPC decoder[J].IEEE Communications Letters,2017,21(8):1703-1706. [12] GAL B L,JEGO C,CRENNE J.A high throughput efficient approach for decoding LDPC codes onto GPU devices[J].IEEE Embedded Systems Letters,2014,6(2):29-32. [13] HOU Yi,LIU Rongke,PENG Hao,et al.High-throughput GPU-based LDPC decoder architecture for space communication[J].Acta Aeronautica Et Astronautica Sinica,2017,38(1):236-245.(in Chinese)侯毅,刘荣科,彭皓,等.适用于空间通信的LDPC码GPU高速译码架构[J].航空学报,2017,38(1):236-245. [14] REN Jilin,CHE Shuling,ZHENG Zheng.Decoding of regular LDPC codes accelerated by the GPU[J].Journal of Xidian University,2017,44(3):25-30.(in Chinese)任计林,车书玲,郑征.规则LDPC码在GPU上的加速译码[J].西安电子科技大学学报,2017,44(3):25-30. [15] LIU Shaoting,WANG Xiaokai,GUO Dabo.Accelerated computational implementation of reconciliation for continuous variable quantum key distribution on GPU[J].Journal on Communications,2017,38(11):171-177.(in Chinese)刘绍婷,王晓凯,郭大波.连续变量量子密钥分发数据协调加速运算的GPU实现[J].通信学报,2017,38(11):171-177. [16] LIU Zhanxian,LIU Rongke,HOU Yi,et al.High throughput multi-codeword decoder for non-binary LDPC codes on GPU[J].IEEE Communications Letters,2018,22(3):486-489. [17] VARNICA N,FOSSORIER M P C,KAVCIC A.Augmented belief propagation decoding of low-density parity check codes[J].IEEE Transactions on Communications,2007,55(7):1308-1317. [18] SCHOLL S,SCHLÄFER P,WEHN N.Saturated min-sum decoding:an afterburner for LDPC decoder hardware[C]//Proceedings of Design,Automation & Test in Europe Conference & Exhibition.Washington D.C.,USA:IEEE Press,2016:1219-1224. [19] KANG Peng,XIE Yixuan,YANG Lei,et al.Enhanced quasi-maximum likelihood decoding of short LDPC codes based on saturation[EB/OL].[2019-09-31].https://arxiv.org/abs/1810.13111. [20] MILICEVIC M,FEN C,ZHANG L M,et al.Key reconciliation with low-density parity-check codes for long-distance quantum cryptography[EB/OL].[2019-09-31].https://arxiv.org/abs/1702.07740. [21] FARBER R.CUDA application design and development[M].San Francisco,USA:Morgan Kaufmann,2011. |