摘要: 以海上测试和水池测试为主的多普勒计程仪测试存在周期长、成本较高等缺点。为此,根据多普勒计程仪的测速原理,研究深度和速度模拟原理,在现场可编程门阵列(FPGA)的基础上,设计一种新的海底回波信号模拟器。该模拟器模拟海底回波信号,在多普勒计程仪接收模拟的回波信号后进行计算,从而得到深度和速度值,对比设定值以达到检验多普勒计程仪的目的。实验结果证明该模拟器的测量误差较小。
关键词:
多普勒计程仪,
模拟器,
现场可编程门阵列,
Verilog语言,
回波信号
Abstract: Doppler log test has the disadvantage of long cycle and high cost which is given priority to sea and pool testing.According to the principle of Doppler log measuring,the principle of depth and speed simulation is studied.This paper designs a new signal simulator based on Field Programmable Gate Array(FPGA),it can simulate the seabed echo signal.The seabed echo signal is received by the Doppler log.The values of depth and speed are given by calculating.By comparing the set values,the measurement is accomplished.Experimental result indicates that the measuring error of this simulator is small.
Key words:
Doppler log,
simulator,
Field Programmable Gate Array(FPGA),
Verilog language,
echo signal
中图分类号:
蒋磊,陈朋,金峰,韩礼波. 基于FPGA的海底回波信号模拟器[J]. 计算机工程.
JIANG Lei,CHEN Peng,JIN Feng,HAN Libo. FPGA-based Seabed Echo Signal Simulator[J]. Computer Engineering.