摘要： 介绍了一种快速的位提取和插入实现方法。该方法通过使用快速的与或逻辑电路而不是较慢的多选1电路来减小时延;通过器件复用技术来减小面积。仿真和综合结果表明该方法大大优化了DSP的时延和面积,有助于提高DSP整体的运算速度和降低功耗。

关键词: 时延, 面积, 移位, 复用技术

Abstract: A fast method of bit extraction and insertion is introduced in this text.Logic circuits is used in this method to replace the relatively slow mux to decrease the time delay required by these instructions. Multiplexing is also used to decrease the area used.Simulation and synthesis indicate that this method can greatly improve the speed and area of DSP,which will benefit the improvement of the accumulating speed and power dissipation in DSP design.

中图分类号: 

• TP332