Abstract: The design of a large-capacity delay line is a key technology of real-time convolver. This paper discusses several design methods of delay line, furthermore, a new design method of delay line based on FPGA embedded Block RAMs is introduced. This method not only can decrease the used FPGA’s CLB resources, but also has a simple and flexible structure, which can be extended easily. This method has been allied to a graphics display system in aircraft cockpit successfully.

Key words: Real-time image manipulation, Convolver, Shift-register, Delay line, FPGA

摘要： 大容量延迟线是设计实时卷积滤波器的一个关键技术。该文讨论了几种实现延迟线的方法，介绍了一种基于FPGA 内嵌 Block RAM的延迟线设计新方法，该方法能大大节省FPGA的CLB资源，且结构简单灵活、易于扩展，并在某型飞机座舱综合图形显示系统中得到了应用。

关键词: 实时图像处理, 卷积滤波器, 移位寄存器, 延迟线, FPGA

CLC Number: 

• TP 391