Abstract:
As the LCD player is widely used in the embedded system, LCD controller IP becomes an important component of SoC. This paper introduces a design of LCD controller which supports TFT and STN LCD. This design uses a frame rate control algorithm based on space-hash to improve the quality of the LCD display. It uses two-level buffer structure to ensure steady output flow. The paper also introduces a modularized configurable automatic verification scheme. This design has been implemented on FPGA.
Key words:
LCD,
Controller,
Frame-rate control,
Verification
摘要: 随着LCD在嵌入式系统中的广泛应用,LCD控制器IP成为SoC芯片中的一个重要部件。文章介绍了一种支持TFT和STN屏的LCD控制器设计。该设计使用了基于空间散列的帧频控制算法以优化LCD显示图像质量,并使用两级缓存结构以保证稳定的输出数据流。文章同时给出了模块化可配置的自动验证方案,并在FPGA上实现了该设计。
关键词:
LCD,
控制器,
帧频控制,
验证
CLC Number:
WANG Yi;SHEN Haibin;FAN Junfeng. Design and Verification of LCD Controller IP Using Optimal Frame-rate Control[J]. Computer Engineering, 2006, 32(16): 235-236,.
汪 翼;沈海斌;樊俊锋. 优化帧频控制的LCD控制器IP的设计与验证[J]. 计算机工程, 2006, 32(16): 235-236,.