Abstract:
This paper analyzes 2 critical problems in FPGA-based implementation of SOM neural network algorithm: parallelizability and finite word-length effect. The analysis of the two problems, this paper presents a highly parallel architecture to implement this algorithm and shows the circuit of critical blocks. By the result of computer simulation and FPGA implementation, shows that the architecture can ensure the quality of the neural network and meanwhile make the circuit have a high computing speed.
Key words:
SOM,
FPGA,
parallelizability,
finite word-length effect
摘要: 分析了SOM神经网络算法在FPGA实现过程中要考虑的2个主要问题:并行性和有限字长效应。通过分析,提出了一种实现该算法的高并行体系结构并给出了该体系结构中关键模块的具体实现电路。根据计算机仿真以及在FPGA上的实现所得到的结果表明,该体系结构在保证神经网络性能的同时,可以使电路具有较高的处理速度。
关键词:
SOM,
FPGA,
并行,
有限字长效应
CLC Number:
KONG Chao; LI Zhan-cai; WANG Qin; LI Ang; QIAN Yi. FPGA-based Parallel Implementation of SOM Neural Network Algorithm[J]. Computer Engineering, 2007, 33(19): 236-237,.
孔 超;李占才;王 沁;李 昂;钱 艺. 一种基于FPGA的SOM神经网络算法的并行实现[J]. 计算机工程, 2007, 33(19): 236-237,.