Abstract:
According to the feature of coarse grain reconfigurable processor, this paper introduces an approach that implements 2D-DCT on coarse grain reconfigurable processor. This approach develops the parallelism of algorithm effectively in the condition of limited hardware resources. As a result, it can get better resource utility and faster speed in comparison with microprocessor and meet the demand of real time picture coding and decoding.
Key words:
2D-DCT,
reconfigurable processor,
coarse grain
摘要: 针对粗粒度可重构处理器的特点,提出一种二维离散余弦变换的设计方法,该方法在硬件资源受限的条件下,有效地挖掘了算法的并行性,结果证明算法在速度和资源利用率方面均达到了较好的状态,可满足实时图像编解码的要求。
关键词:
二维离散余弦变换,
可重构处理器,
粗粒度
CLC Number:
XU Jia-qing; WU Gui-ming; DOU Yong. Implementation of 2D-DCT on Coarse Grain Reconfigurable Processor[J]. Computer Engineering, 2008, 34(20): 257-259.
徐佳庆;邬贵明;窦 勇. 二维DCT在粗粒度可重构处理器上的实现[J]. 计算机工程, 2008, 34(20): 257-259.