Abstract: Aiming at the problem that the traditional median filtering arithmetic blurs the image, this paper introduces an improved algorithm by adding threshold comparison to the traditional median filtering algorithm, which can make the image maintain much more details after processed. As the traditional methods need too many clock periods to implement the median filtering in Field Programmable Gate Array(FPGA), a new circuit is designed, which can quickly get median value of some numbers in three clock periods. The simulation result shows that the algorithm not only can filter the noise better, but also can make the image much clearer, and the designed circuit can implement the arithmetic quickly and efficiently.

Key words: median filtering, Field Programmable Gate Array(FPGA), fast algorithm, threshold

摘要： 针对传统中值滤波算法带来的图像模糊问题，提出一种改进算法，加入阈值比较环节以便更好地保持图像细节。当用FPGA实现中值滤波算法时，传统方法需要较多的时钟周期，由此设计一种新的硬件实现电路，仅用3个周期就能快速地取得中值。仿真结果说明，该改进算法不仅能够取得良好的滤波效果，而且使所处理的图像更加清晰，所设计的硬件电路能够快速、高效地对算法进行实现。

关键词: 中值滤波, 现场可编程门阵列, 快速算法, 阈值

CLC Number: 

• TP391