Abstract:

To meet the demands of application situation of mass data throughput, this paper researches memorizing control algorithm which supports high treatment efficiency and data continuous read/write operation, and uses Field Programmable Gate Array(FPGA) to design SDRAM embedded control algorithm. The controller uses CMD order mode, assigns time-delay of continuous read/write based on burst length, enhances the data processing efficiency by team working between data channel control and read/write operation. Testing results show that running frequency of this controller is higher than 100 MHz, data processing efficiency is above 95%, and it applies to data buffer of video acquisition and large size display control of LED.

Key words: Synchronous Dynamic Random Access Memory(SDRAM), Field Programmable Gate Array(FPGA), continuous read/write instruction

摘要：

为适应高数据吞吐速率的应用场合，在分析同步动态随机存储器(SDRAM)控制器工作原理的基础上，研究支持高数据处理效率可连续读写操作的存储控制算法。利用现场可编程门阵列设计SDRAM嵌入式存储控制器，采用CMD命令形式，根据猝发长度分配连续读写延时，通过数据通道控制与读写操作协同工作提高数据处理效率。测试结果表明，该控制器运行频率高于100 MHz，数据处理效率大于95%，适用于视频采集数据缓存及大型LED显示控制中。

关键词: 同步动态随机存储器, 现场可编程门阵列, 连续读写指令

CLC Number: 

• TP333