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Encryption and Decryption Subsystem Based on Embedded CPU

WANG Jian-fei  1,MA De  2,XIONG Dong-liang  3,CHEN Liang  3,HUANG Kai  3,GE Hai-tong  4   

  1. (1. The First Research Institute of the Ministry of Public Security,Beijing 100048,China; 2. Institute of Microelectronics CAD,Hangzhou Dianzi University,Hangzhou 310018,China; 3. Institute of VLSI Design,Zhejiang University,Hangzhou 310027,China; 4. C-Sky Microsystems Co.,Ltd.,Hangzhou 310012,China)
  • Received:2013-07-23 Online:2014-09-15 Published:2014-09-12

基于嵌入式CPU 的加解密子系统

王剑非1,马 德2,熊东亮3,陈 亮3,黄 凯3,葛海通4   

  1. (1. 公安部第一研究所,北京100048;2. 杭州电子科技大学微电子CAD 所,杭州310018;3. 浙江大学超大规模集成电路设计研究所,杭州310027;4. 杭州中天微系统有限公司,杭州310012)
  • 作者简介:王剑非(1979 - ),男,工程师、硕士,主研方向:移动互联网通信安全;马 德,博士;熊东亮,硕士研究生;陈 亮,硕士; 黄 凯,副教授、博士;葛海通,教授级高级工程师、博士。
  • 基金资助:
    国家科技重大专项基金资助项目“宽带多媒体集群系统技术验证(中速模式)”(2011ZX03004-004)。

Abstract: To improve the efficiency of System-on-Chip(SoC) integration and verification for different applications of information security,a complete and pre-verified encryption and decryption subsystem based on embedded CPU is proposed. The subsystem includes cryptography modules such as RSA,DES,AES and so on. It can satisfy applications of different requirements on security levels. The embedded CPU in subsystem is a low-power and high-performance CPU,as a coprocessor for main CPU in SoC. It is responsible for controlling the operation of cryptography modules, reducing both the computation load of the main CPU and the power of SoC greatly. Integrating the pre-verified encryption and decryption subsystem as a whole to SoC,significantly reduces SoC design and integration effort and lowers the difficulty of SoC verification. Using gated clock technology, which manages the clock of cryptography modules based on their states,reduces the power of subsystem effectively. According to the CKSoC Integration method, the subsystem based on embedded CPU in different hardware configuration can be implemented quickly in the SoC integrator. Experimental results show that SoC design and verification work of constructing subsystem are reduced,and it improves work efficiency.

Key words: encryption and decryption subsystem, system reuse, System-on-Chip ( SoC ) integration, Advanced Encryption Standard(AES), Data Encryption Standard(DES)

摘要: 针对信息安全等级和应用场合变化时IP 级复用的片上系统(SoC)集成验证效率低的问题,提出一种基于嵌入式CPU 的加解密子系统。子系统包括RSA,DES,AES 等多种加解密模块,通过硬件上的参数配置,构造满足不同信息安全应用和等级的子系统;采用低功耗高性能的嵌入式CPU,作为SoC 中主CPU 的协处理器,控制各加解密模块的工作,可减少对主CPU 的访问,以降低功耗。将经过验证的加解密子系统作为整体集成到SoC 中,实现子系统复用,可减少SoC 设计和集成工作量,降低SoC 验证难度;利用门控时钟技术,根据各加解密模块的工作状态管理时钟,从而降低加解密子系统的功耗。采用CKSoC 设计集成方法,在SoC 集成工具平台上可快速集成不同配置下的基于嵌入式CPU 的加解密子系统。实验结果表明,构造子系统后的SoC 设计和验证工作量明显减少,提高了工作效率。

关键词: 加解密子系统, 系统复用, 片上系统集成, 高级加密标准, 数据加密标准

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