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Computer Engineering ›› 2008, Vol. 34 ›› Issue (11): 260-262.

• Developmental Research • Previous Articles     Next Articles

FPGA Configuration Compression Algorithm

XING Hong, TONG Jia-rong, WANG Ling-li   

  1. (State Key Lab of Application Specific Integrated Circuit, Fudan University, Shanghai 201203)
  • Received:1900-01-01 Revised:1900-01-01 Online:2008-06-05 Published:2008-06-05

一种FPGA配置文件压缩算法

邢 虹,童家榕,王伶俐   

  1. (复旦大学专用集成电路国家重点实验室,上海 201203)

Abstract: The reconfigurable system based on Field Programmable Gate Array(FPGA) has high performance and flexibility. With the enlarging of FPGA size, the dramatic increase in configuration data size has resulted in a corresponding increase in the time required for reconfiguration. This paper proposes a FPGA configuration compression algorithm——VLZW which can reduce the off-chip memory required for storing FPGA configurations. This algorithm cuts down the reconfiguration time of the system by reducing the transmittal configureation data.

Key words: Field Programmable Gate Array(FPGA), configuration compression, reconfigurable

摘要: 基于现场可编程门阵列(FPGA)的可重构系统具有高性能和高灵活性,但随着FPGA规模的不断扩大,配置文件规模相应增加,导致可重构计算时间过长。该文提出一种FPGA配置文件压缩算法VLZW,降低了对片外存储器的容量要求,通过减少每次重构传送的配置数据缩短了系统重构时间。

关键词: 现场可编程门阵列, 配置文件压缩, 可重构

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