| [1] |
LI Yuqian, JIAO Jiye, LIU Youyao, HAO Zhenhe.
Research and Design of Embedded RISC-V Out-of-Order Execution Processor
[J]. Computer Engineering, 2021, 47(2): 261-267,284.
|
| [2] |
DING Xiangwu,ZHANG Donghui.
Safety Reinforcement Scheme for Hadoop Platform
[J]. Computer Engineering, 2018, 44(12): 94-101.
|
| [3] |
ZHU Xiding,ZHANG Tao,YU Ziqi,HU Zhichuan.
A Design of Vectored Interrupt Controller Supporting Multiple FIQ
[J]. Computer Engineering, 2017, 43(12): 60-64.
|
| [4] |
WANG Yunfei,LI Yuan,WANG Biao.
Prediction of Coherence Request Broadcast Range Based on Access Locality
[J]. Computer Engineering, 2017, 43(10): 17-22,30.
|
| [5] |
WANG Yunfei,WANG Biao,LI Yuan,SUN Zhanxian.
A Hybrid Coherence Protocol Applied to Multi-channel Direct Connection CMP
[J]. Computer Engineering, 2017, 43(7): 38-43.
|
| [6] |
WANG Yue,LIU Yaqiu,GUO Jifeng,JING Weipeng.
QoS Scheduling Algorithm in Cloud Computing Based on Discrete Particle Swarm Optimization
[J]. Computer Engineering, 2017, 43(6): 111-117.
|
| [7] |
QIU Xiaojie,AN Hong,CHEN Junshi,CHI Mengxian,JIN Xu.
Energy Efficiency Optimization Scheme for Multi-core Processor Under Power Consumption Constraint
[J]. Computer Engineering, 2017, 43(4): 39-45.
|
| [8] |
JIANG Shengjian,HU Xiangdong,YANG Jianxin.
Instruction Fetch Policy for SMT Processors with Different Allocations of Floating-point and Integer Resources
[J]. Computer Engineering, 2017, 43(4): 46-51.
|
| [9] |
MA Xiaoxia,LI Wenxin,JIN Tian,ZHAO Yanrong,XIA Jiagao.
Design and Implementation of Multicore Floating-point Nonlinear Operation Coprocessor
[J]. Computer Engineering, 2017, 43(2): 131-136.
|
| [10] |
HONG Qi, HE Min, FAN Ji-cong, YUAN Can.
Design and Implementation of Reconfigurable Floating-point Fused/Continuous Multiply-adder
[J]. Computer Engineering, 2014, 40(7): 272-276.
|
| [11] |
YAN Min, DAI Rong-xin, CAI Yi-jun, XU Huan, ZHENG Qian, CHENG Cheng.
Design of Embedded Interrupt Controller Based on Advanced High-performance Bus
[J]. Computer Engineering, 2014, 40(6): 1-4.
|
| [12] |
SUN Da-qun, YAN Yi, WU Hui-feng.
Data Dependence Relation Analysis and Concurrent Extraction of Ladder Diagram
[J]. Computer Engineering, 2014, 40(2): 67-70,76.
|
| [13] |
HAN Zheng-Fei, LI Jin-Song, BO Gong-Bing, LI Li, SHA Jin, HE Shu-Zhuan.
Design of Floating-point Vector Coprocessor Based on FPGA
[J]. Computer Engineering, 2012, 38(5): 251-254.
|
| [14] |
MENG Jiao, FAN Xiao-Guang, WU Meng, JIA Hai-Bao.
Design and Implementation of Chip-level BIST Controller
[J]. Computer Engineering, 2011, 37(21): 238-240,251.
|
| [15] |
DONG Shu-Chang-Lei.
Design of Reduced Instruction Set Computer Processor Based on Field Programmable Gate Array
[J]. Computer Engineering, 2011, 37(11): 242-244.
|