Search
E-mail
RSS

Author Login Chief Editor Login Reviewer Login Editor Login Remote Office
Author Login Chief Editor Login Reviewer Login Editor Login Remote Office
FPGA-based Software and Hardware Cooperative Acceleration Scheme of Erasure Code Encoding
Sijie YANG, Junqi CHEN, Yong WANG, Shulin LI
Computer Engineering . 2024, (2): 224 -231 .  DOI: 10.19678/j.issn.1000-3428.0066809

Total Visitors: . Now Online:
copyright@Editorial Department of Computer Engineering
2023@East-China Institute of Computer Technology, Shanghai ICP Registration No. 08102551-2
Address: No. 63, Chengliu Road, Shanghai, 201808
Tel: 021-67092217　
E-mail：ecice06@ecict.com.cn
Shanghai Public Security Registration No. 31011402007040
Powered by Beijing Magtech Co. Ltd,.