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计算机工程 ›› 2026, Vol. 52 ›› Issue (7): 1-21. doi: 10.19678/j.issn.1000-3428.0260431

• 前沿观点与综述 • 上一篇    下一篇

迈向高效AI:边缘侧模型压缩技术综述

范兴刚1,2, 时雪刚1, 廖思腾3, 赵依依2, 梁玉珠3, 王田3   

  1. 1. 浙江工业大学计算机科学与技术学院, 浙江 杭州 310023;
    2. 浙江工业大学之江学院, 浙江 绍兴 312030;
    3. 北京师范大学人工智能与未来网络研究院, 广东 珠海 519087
  • 收稿日期:2026-04-02 修回日期:2026-05-18 出版日期:2026-07-15 发布日期:2026-07-04
  • 作者简介:范兴刚(CCF会员),男,教授、博士,主研方向为物联网、边缘计算;时雪刚,硕士研究生;廖思腾,博士研究生;赵依依,本科生;梁玉珠(通信作者),博士、博士后;王田,教授、博士,E-mail:Yuzhuliang@bnu.edu.cn。
  • 基金资助:
    国家自然科学基金联合重点基金项目(U25A20436)。

Towards Efficient AI: A Survey of Model Compression Techniques on the Edge

FAN Xinggang1,2, SHI Xuegang1, LIAO Siteng3, ZHAO Yiyi2, LIANG Yuzhu3, WANG Tian3   

  1. 1. College of Computer Science and Technology, Zhejiang University of Technology, Hangzhou 310023, Zhejiang, China;
    2. College of Zhijiang, Zhejiang University of Technology, Shaoxing 312030, Zhejiang, China;
    3. Institute of Artificial Intelligence and Future Networks, Beijing Normal University, Zhuhai 519087, Guangdong, China
  • Received:2026-04-02 Revised:2026-05-18 Online:2026-07-15 Published:2026-07-04

摘要: 大语言模型(LLM)参数规模的激增与边缘终端受限的物理资源间存在结构性矛盾,制约了其规模化落地。传统的云端集中式推理高度依赖网络传输,面临较高的通信延迟,难以满足自动驾驶、智能医疗等场景对极低延迟与严格数据隐私保护的双重诉求。然而,边缘物理硬件从微控制器到边缘网关,具有极大的异构性,云侧通用压缩方案难以直接平移。为此,本文立足于边缘设备的异构物理约束,系统性地综述了面向边缘侧的大模型高效压缩与软硬件协同部署技术体系。首先,本文剖析了模型量化、参数剪枝与知识蒸馏(KD)三大核心压缩技术在边缘场景下的底层机制。在量化方面,训练后量化(PTQ)虽具备部署敏捷性,但面临LLM长尾激活异常导致的表征坍塌难题;量化感知训练(QAT)虽具有一定鲁棒性,却受制于边缘重训算力匮乏的瓶颈。在剪枝方面,本文论证了结构化剪枝在受限访存带宽硬件上的实际能效优势,指出非结构化剪枝的高理论压缩率易被通用边缘芯片的索引寻址开销所抵消。在蒸馏方面,传统浅层参数对齐在跨越教师与边缘学生模型间的容量鸿沟时,存在特征丢失与偏见放大风险。综合来看,单一压缩技术在极端约束下已呈现出明显的边际收益递减效应。其次,为缓解单一技术的性能瓶颈,本文归纳了受模型架构与物理场景双重驱动的多级混合压缩范式。系统梳理了3类核心优化链路:追求较高物理压缩率的串行流水线策略,适配边缘网关的实时推理;面向能效与精度严格折中的深度耦合联合优化流程,将量化、剪枝与低秩分解置于同一框架内同步更新,适配功耗受限的移动终端;面向大参数模型部署的蒸馏驱动机制,利用教师先验引导结构重塑与量化。该多级范式有效拓展了模型规模、计算功耗与保真度之间的多维权衡空间。进一步地,面对跨度极大的算力与能耗阶梯,本文构建了"系统-模型-算子-指令"4层软硬件协同设计机制。明确指出协同优化重心需依据物理基座约束进行动态转移:系统级侧重云边环境的资源感知调度与任务分发;模型级依赖硬件感知架构搜索实现结构自适应;算子级推进跨层融合与访存局部性重构;指令级则聚焦特定微架构(如RISC-V)的定制扩展指令,以精准控制底层能耗。结合模型转换、编译重构与内存管理(如SwapNet)的全链条部署流程,该机制实现了压缩算法向底层物理执行的有效映射,提升了异构算力的综合利用效率。最后,本文前瞻性地指出了边缘智能轻量化领域的未来研究挑战。强调超低位宽(≤4 bit)的鲁棒性补偿机制、硬件自适应动态半结构化剪枝,以及对大模型深层逻辑推理的有效知识转移,是克服当前轻量化瓶颈的核心方向。同时,亟需依托深度学习编译器构建硬件无感的统一工具链,消除碎片化异构设备的部署壁垒。本文通过体系化的技术梳理,为发展低延迟且强隐私保护的边缘智能生态提供了坚实的理论支撑与参考指南。

关键词: 边缘侧大模型, 量化与剪枝, 知识蒸馏, 混合压缩, 软硬件协同设计

Abstract: A considerable structural contradiction exists between the surge in the parameter scale of Large Language Models (LLMs) and the limited physical resources of edge terminals, which restricts their large-scale deployment. Traditional cloud-centric inference relies heavily on network transmission and suffers from high communication latency, making it difficult to meet the dual demands of ultra-low latency and strict data privacy protection in scenarios such as autonomous driving and intelligent healthcare. Meanwhile, edge physical hardware, ranging from microcontrollers to edge gateways, exhibits significant heterogeneity, making it difficult to transfer of general cloud-side compression schemes directly. To this end, grounded in the heterogeneous physical constraints of edge devices, this study systematically reviews the technical system of efficient compression and software—hardware co-deployment of large models on the edge. First, this study analyzes the underlying mechanisms of three core compression techniques, namely model quantization, parameter pruning, and Knowledge Distillation (KD), specifically in edge scenarios. Although Post-Training Quantization (PTQ) offers deployment agility, it faces the challenge of representation collapse caused by abnormal long-tail activations in large language models. While more robust, Quantization-Aware Training (QAT) is constrained by the scarcity of retrained computations at the edge. This study demonstrates the practical energy efficiency advantages of structured pruning on hardware with constrained memory bandwidth, highlighting that the high theoretical compression ratio of unstructured pruning is easily offset by the indexing and addressing overhead on general-purpose edge chips. Traditional shallow parameter alignment risks feature loss and bias amplification when bridging the capacity gap between teacher and edge student models. In summary, the single-compression techniques exhibit clear diminishing returns under extreme constraints. Second, to alleviate the performance bottlenecks of individual techniques, this study generalizes a multi-stage hybrid compression paradigm driven jointly by model architecture and physical scenarios. The three core optimization pipelines are systematically categorized as follows: 1) a serial pipeline strategy that pursues a high physical compression rate and suits real-time inference on edge gateways; 2) a deeply coupled joint optimization flow that strictly balances energy efficiency and accuracy by integrating quantization, pruning, and low-rank decomposition within a single framework for synchronous updates, which is suitable for power-constrained mobile terminals; and 3) a distillation-driven mechanism for deploying large-parameter models that uses teacher priors to guide structural reshaping and quantization. This multi-stage paradigm effectively expands the multi-dimensional trade-off space among model scale, computational power consumption, and fidelity. Furthermore, facing a broad spectrum of computing power and energy consumption levels, this study constructs a four-layer software—hardware co-design mechanism comprising the system, model, operator, and instruction levels. It clearly states that the focus of co-optimization must shift dynamically according to physical substrate constraints. At the system level, it focuses on resource-aware scheduling and task distribution in cloud—edge environments; at the model level, it relies on hardware-aware neural architecture search to achieve structural adaptation; at the operator level, it promotes cross-layer fusion and memory access locality restructuring; and at the instruction level, it targets custom extended instructions for specific microarchitectures (e.g., RISC-V) to precisely control underlying energy consumption. Together with the full-chain deployment process comprising model conversion, compilation reengineering, and memory management (e.g., SwapNet), this mechanism effectively maps compression algorithms to the underlying physical execution and improves the comprehensive utilization efficiency of heterogeneous computing resources. Finally, future research challenges in the field of edge intelligence lightweighting are prospectively identified. It emphasizes that robust compensation mechanisms for ultra-low bitwidth (≤4 bit), hardware-adaptive dynamic semi-structured pruning, and effective knowledge transfer for deep logical reasoning in large models are core directions for overcoming current lightweighting bottlenecks. Simultaneously, a hardware-agnostic unified toolchain based on deep-learning compilers must be built to eliminate deployment barriers caused by fragmented heterogeneous devices. This systematic technical review provides solid theoretical support and a reference guide for developing a low-latency, strong-privacy protection edge intelligence ecosystem.

Key words: edge-side large model, quantization and pruning, knowledge distillation, hybrid compression, software—hardware co-design

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