Abstract: Highspeed channel architecture and IP core design of RAID is discussed in this paper. Data is transacted efficiently by the embedded processor with real time operation system and transferred reliably and fleetly by the programmed logic through the highspeed channel of RAID. The concept and model of configure and communication protocol of RAID are also put forward. Finally, the design prototype of channel IP core is brougnt forward.

摘要： 论述了RAID高速通道的系统结构及其IP Core设计。在RAID高速通道系统中，数据由嵌入式处理器及实时操作系统高效处理，并通过可编程逻辑可靠、快速传输。还提出了RAID的可配置性和通信协议的概念及模型。给出了通道的IP Core设计原型。

关键词: 高速通道, 知识产权, 硬件描述语言, 嵌入式, 磁盘阵列

CLC Number: 

• TP333