Author Login Chief Editor Login Reviewer Login Editor Login Remote Office

›› 2005, Vol. 31 ›› Issue (06): 216-217.

• Papers • Previous Articles     Next Articles

Design of 3-DES Algorithm IP-Core Using FPGA

DONG Xiaojian, LIU Zhijun, YU Jianhua   

  1. ( School of Information Science and Engineering, Shandong University, Jinan 250100)
  • Published:2005-03-25

现场可编程器件3-DES算法IP核的设计

董晓剑,刘志军,于建华   

  1. 山东大学信息科学与工程学院,山东大学信息科学与工程学院,山东大学信息科学与工程学院 济南 250100

Abstract: This paper introduces algorithm of DES and 3-DES briefly and gives a circuit model of 3-DES algorithm. A design of IP-core that based on FPGA devices of Xilinx corporation is given, what's more, it gives the design method of models in this IP-core .

摘要: 介绍了DES和3-DES算法的概要,给出了一种电路实现模型,并基于Xilinx公司的FPGA器件设计了IP核,描述了IP核设计中主要模块的设计方法。

关键词: 3-DES算法, IP核, FPGA, VHDL

CLC Number: