摘要：

随着集成电路设计复杂度的急剧攀升，其呈现出全球化和分工化的发展趋势，需要越来越多的第三方知识产权(IP)核提供者的参与。第三方IP核的广泛使用会引入硬件木马，为了检测和评估第三方IP核是否存在硬件木马以及硬件木马的功能，迫切需要探索出一种可行的IP核硬件安全评估方法，数字电路模块的功能识别作为硬件木马分析的基础研究引起了人们的广泛关注。将电路功能检测任务转换为多分类任务，结合电路结构和图数据结构的特点，提出一种基于图注意力网络(GAT)的门级电路功能分类和检测方法。首先，针对门级网表缺乏功能识别数据集的问题，通过搜集具有代表性的寄存器传输级(RTL)代码并综合生成门级网表，构建一个规模适当、种类多样的门级电路数据集。然后，为了提取和处理电路特征信息，开发了一种基于文本识别的软件工具，将复杂的电路互连结构映射为结构简单的JSON(JavaScript Object Notation)格式，便于神经网络处理。最后，采用图注意力神经网络，利用构建的门级网表数据集对多分类器进行训练，经过训练后的多分类器能够对未知门级电路进行分类和识别。实验结果表明，该多分类器通过对自建数据集中6类共计3 000多条网表数据进行学习后，最终对6类645个网表能够达到90%的分类正确率。

关键词: 集成电路, 电路网表, 功能识别, 深度学习, 图神经网络

Abstract:

With the rapid increase in the complexity of integrated circuit design, a trend of globalization and division of labor has emerged, necessitating the involvement of an increasing number of third-party Intellectual Property (IP) core providers. The widespread use of third-party IP cores introduces risks of hardware trojans. To detect and evaluate the presence of hardware trojans and their potential functionalities in third-party IP cores, there is an urgent need to explore feasible hardware security evaluation methods for IP cores. The functional identification of digital circuit modules has garnered significant attention as a fundamental research area in hardware trojan analysis. In this study, the task of circuit function detection is transformed into a multiclassification problem. By leveraging the characteristics of the circuit and graph data structures, a gate-level circuit function classification and detection method based on Graph Attention Networks (GAT) is proposed. First, to address the lack of functional identification datasets for gate-level netlists, a representative set of Register Transfer Level (RTL) codes is collected and synthesized to generate gate-level netlists, thereby constructing a gate-level circuit dataset of appropriate scale and diversity. Subsequently, to extract and process the circuit feature information, a software tool based on text recognition is developed. This tool maps the complex interconnections of circuits into a structured and concise JSON(JavaScript Object Notation) format, thereby facilitating neural network processing. Finally, a graph attention neural network is employed to train a multiclassifier using the constructed gate-level netlist dataset. After training, the multiclassifier becomes capable of classifying and identifying unknown gate-level circuits. The experimental results demonstrate that the classifier, after learning from more than 3 000 netlists in the self-built dataset, achieves a classification accuracy of 90% for 645 netlists across six categories.

Key words: integrated circuit, circuit netlist, function recognition, deep learning, graph neural network