Compact Hardware and Software Cooperative Implementation of Aigis Digital Signature and Key Encapsulation

doi:10.19678/j.issn.1000-3428.0070542

Computer Engineering ›› 2026, Vol. 52 ›› Issue (7): 277-286. doi: 10.19678/j.issn.1000-3428.0070542

• Cyberspace Security • Previous Articles Next Articles

Compact Hardware and Software Cooperative Implementation of Aigis Digital Signature and Key Encapsulation

LI Yan¹, SUN Jiuxing¹, CHEN Xin², XUE Yiming², LIU Jian²^,³^,*()

1. College of Science, China Agricultural University, Beijing 100083, China
2. College of Information and Electrical Engineering, China Agricultural University, Beijing 100083, China
3. CEC Huada Electronic Design Co., Ltd., Beijing 102209, China

Received:2024-10-28 Revised:2025-01-22 Online:2026-07-15 Published:2026-07-04
Contact: LIU Jian

紧凑的Aigis数字签名和密钥封装的软硬件协同实现

李岩¹, 孙久兴¹, 陈昕², 薛一鸣², 刘戬²^,³^,*()

1. 中国农业大学理学院, 北京 100083
2. 中国农业大学信息与电气工程学院, 北京 100083
3. 北京中电华大电子设计有限责任公司, 北京 102209

通讯作者: 刘戬
作者简介:
李岩(CCF专业会员), 男, 副教授、博士, 主研方向为数论、密码学、编码
孙久兴, 硕士研究生
陈昕, 硕士研究生
薛一鸣, 教授
刘戬(通信作者), 高级工程师、硕士
基金资助:
国家自然科学基金面上项目(62272463); 密码科学技术国家重点实验室开放课题基金(MMKFKT201910)

Abstract

Abstract:

The development of quantum computing threatens the security of existing public-key cryptosystems. To prevent the ″store-now-decrypt-later″ attack, existing public-key cryptosystems must urgently migrate to post-quantum cryptosystems. The Aigis-sig digital signature scheme and Aigis-enc key encapsulation scheme, constructed based on ideal lattices, are the first-prize winners in China's cryptographic algorithm design competition and possess advantages in terms of resisting quantum attacks. The codes of the two systems are integrated to enhance resource utilization and enable the efficient application of Aigis-sig and Aigis-enc with limited hardware resources. Two sets of butterfly operators are designed on the hardware modules, significantly improving the computational efficiency of the fast Number Theory Transformation (NTT) through pipelined operations. Building on this, a hardware—software co-design implementation method for the Aigis-sig and Aigis-enc schemes is proposed. Experimental tests demonstrate that this approach achieves notable performance improvements compared to a pure software implementation. Specifically, the ROM space usage is reduced by 65%, the average execution times for digital signing and verification are shortened by 29% and 11%, respectively, and the average execution times for key encapsulation and decapsulation are shortened by 13% and 21%, respectively.

Key words: post-quantum cryptography, digital signature, key encapsulation, hardware—software co-design, fast Number Theory Transformation (NTT)

摘要：

量子计算机的发展威胁到了现有公钥密码系统的安全性, 为防止"先存储后解密"的攻击, 现有公钥密码系统向后量子密码系统迁移迫在眉睫。基于理想格构造的Aigis-sig数字签名方案和Aigis-enc密钥封装方案是我国密码算法设计竞赛一等奖作品, 具有抗量子攻击的优势。为了使Aigis-sig和Aigis-enc能够在有限的硬件资源中高效应用, 对两个系统的代码进行整合, 提高资源利用率。在硬件模块上设计两组蝶形运算器, 通过流水线操作大幅提升快速数论变换(NTT)的计算效率。在此基础上, 提出Aigis-sig方案和Aigis-enc方案的软硬件协同实现方法。经实验测试, 该方案相较于纯软件实现有可观的性能提升, 其中, ROM空间占用降低65%, 数字签名和验签的平均运行时间分别缩短29%和11%, 密钥封装和解封装的平均运行时间分别缩短13%和21%。

关键词: 后量子密码, 数字签名, 密钥封装, 软硬件协同, 快速数论变换

LI Yan, SUN Jiuxing, CHEN Xin, XUE Yiming, LIU Jian. Compact Hardware and Software Cooperative Implementation of Aigis Digital Signature and Key Encapsulation[J]. Computer Engineering, 2026, 52(7): 277-286.

李岩, 孙久兴, 陈昕, 薛一鸣, 刘戬. 紧凑的Aigis数字签名和密钥封装的软硬件协同实现[J]. 计算机工程, 2026, 52(7): 277-286.

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Figures/Tables 16

Fig.1 Butterfly operation

Fig.2 Improved Aigis-sig algorithm

Fig.3 Hardware accelerator module

Fig.4 Performance test results of key encapsulation system

Fig.5 Performance test results of digital signature system

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